All tracks True tracks Fake tracks Duplicate tracks
A B C D A B C D A B C D A B C D
TIB1+TIB2+MTIB3 16 20 20 20 15 16 16 16 1 4 4 4 0 0 0 0
TIB1+TIB2+MTIB4 19 14 13 15 17 13 13 14 2 1 0 1 0 0 0 0
TIB1+TIB2+MTID1_pos 7 2 2 2 7 1 1 1 0 1 1 1 0 0 0 0
TIB1+TIB2+MTID1_neg 6 6 5 6 5 6 5 6 1 0 0 0 0 0 0 0
TID1_pos+TID2_pos+TID3_pos 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
TID1_neg+TID2_neg+TID3_neg 2 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0
TID1_pos+TID2_pos+MTID3_pos 7 4 3 4 6 4 3 4 1 0 0 0 0 0 0 0
TID1_neg+TID2_neg+MTID3_neg 3 3 3 3 3 3 3 3 0 0 0 0 0 0 0 0
TID1_pos+TID2_pos+MTEC1_pos 0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0
TID2_pos+TID3_pos+TEC1_pos 9 4 4 4 7 3 3 3 2 1 1 1 0 0 0 0
TID2_neg+TID3_neg+TEC1_neg 1 2 1 2 1 1 1 1 0 1 0 1 0 0 0 0
TID2_pos+TID3_pos+MTEC1_pos 3 1 1 1 2 0 0 0 1 1 1 1 0 0 0 0
TID2_neg+TID3_neg+MTEC1_neg 5 6 5 4 4 3 3 2 1 3 2 2 0 0 0 0
TEC1_pos+TEC2_pos+TEC3_pos 3 0 0 0 3 0 0 0 0 0 0 0 0 0 0 0
TEC1_neg+TEC2_neg+TEC3_neg 2 1 1 1 2 1 1 1 0 0 0 0 0 0 0 0
TEC1_pos+TEC2_pos+TEC4_pos 2 2 2 2 2 2 2 2 0 0 0 0 0 0 0 0
TEC2_pos+TEC3_pos+TEC4_pos 3 2 3 3 1 2 2 2 2 0 1 1 0 0 0 0
TEC2_neg+TEC3_neg+TEC4_neg 1 3 3 3 1 2 2 2 0 1 1 1 0 0 0 0
TEC2_neg+TEC3_neg+MTEC4_neg 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0
TEC2_pos+TEC3_pos+TEC5_pos 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
TEC2_neg+TEC3_neg+TEC5_neg 2 1 1 1 0 1 1 1 2 0 0 0 0 0 0 0
TEC2_pos+TEC3_pos+TEC6_pos 3 0 0 0 2 0 0 0 1 0 0 0 0 0 0 0
TEC2_neg+TEC3_neg+TEC6_neg 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0
TEC3_pos+TEC4_pos+TEC5_pos 0 7 6 8 0 3 3 4 0 4 3 4 0 0 0 0
TEC3_neg+TEC4_neg+TEC5_neg 3 5 4 5 2 2 1 2 1 3 3 3 0 0 0 0
TEC3_pos+TEC4_pos+MTEC5_pos 1 1 1 1 0 1 1 1 1 0 0 0 0 0 0 0
TEC3_pos+TEC5_pos+TEC6_pos 0 2 2 2 0 1 1 1 0 1 1 1 0 0 0 0
TEC3_neg+TEC5_neg+TEC6_neg 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
TEC4_neg+TEC5_neg+TEC6_neg 0 1 3 2 0 0 1 1 0 1 2 1 0 0 0 0
TEC1_pos+TEC2_pos 41 24 23 23 29 15 15 16 12 9 8 7 0 0 0 0
TEC1_neg+TEC2_neg 37 20 19 19 22 11 12 12 15 9 7 7 0 0 0 0
TEC2_pos+TEC3_pos 9 9 9 7 4 7 6 5 5 2 3 2 0 0 0 0
TEC2_neg+TEC3_neg 8 12 12 13 6 7 6 7 2 5 6 6 0 0 0 0
TEC3_pos+TEC4_pos 0 0 1 1 0 0 1 1 0 0 0 0 0 0 0 0
TEC3_neg+TEC4_neg 1 2 3 2 1 2 3 2 0 0 0 0 0 0 0 0
TEC4_pos+TEC5_pos 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0
TIB1+TIB2 510 368 372 369 445 340 345 340 65 28 27 29 0 0 0 0
TID1_pos+TID2_pos 31 15 13 15 28 12 11 12 3 3 2 3 0 0 0 0
TID1_neg+TID2_neg 27 12 13 14 21 10 9 11 6 2 4 3 0 0 0 0
TID2_pos+TID3_pos 8 6 6 6 4 5 5 5 4 1 1 1 0 0 0 0
TID2_neg+TID3_neg 9 8 7 8 9 6 5 6 0 2 2 2 0 0 0 0
TEC3_pos+TEC5_pos 0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0
A: DQM_V0001_R000000001__Global__CMSSW_ckfPU50__RECO
B: DQM_V0001_R000000001__Global__CMSSW_mkFitPU50LowPtQuad__RECO
C: DQM_V0001_R000000001__Global__CMSSW_LowptQnoclean__RECO
D: DQM_V0001_R000000001__Global__CMSSW_looseSC__RECO