All tracks True tracks Fake tracks Duplicate tracks
A B C D A B C D A B C D A B C D
TIB1+TIB2+MTIB3 58 36 37 37 49 32 33 33 9 4 4 4 0 0 0 0
TIB1+TIB2+MTIB4 38 17 17 17 26 16 16 16 12 1 1 1 0 0 0 0
TIB1+TIB2+MTID1_pos 11 3 2 2 9 2 1 1 2 1 1 1 0 0 0 0
TIB1+TIB2+MTID1_neg 14 10 9 9 9 8 7 7 5 2 2 2 0 0 0 0
TID1_pos+TID2_pos+TID3_pos 4 2 2 2 3 2 2 2 1 0 0 0 0 0 0 0
TID1_neg+TID2_neg+TID3_neg 6 2 2 2 6 2 2 2 0 0 0 0 0 0 0 0
TID1_pos+TID2_pos+MTID3_pos 8 5 4 4 8 4 3 3 0 1 1 1 0 0 0 0
TID1_neg+TID2_neg+MTID3_neg 4 6 6 6 4 6 6 6 0 0 0 0 0 0 0 0
TID1_pos+TID2_pos+MTEC1_pos 2 3 2 2 2 2 2 2 0 1 0 0 0 0 0 0
TID1_neg+TID2_neg+MTEC1_neg 4 0 0 0 3 0 0 0 1 0 0 0 0 0 0 0
TID2_pos+TID3_pos+TEC1_pos 19 10 9 9 17 10 9 9 2 0 0 0 0 0 0 0
TID2_neg+TID3_neg+TEC1_neg 11 8 8 8 10 8 8 8 1 0 0 0 0 0 0 0
TID2_pos+TID3_pos+MTEC1_pos 6 7 6 6 4 7 6 6 2 0 0 0 0 0 0 0
TID2_neg+TID3_neg+MTEC1_neg 8 7 6 6 8 6 5 5 0 1 1 1 0 0 0 0
TEC1_pos+TEC2_pos+TEC3_pos 13 6 6 6 12 6 6 6 1 0 0 0 0 0 0 0
TEC1_neg+TEC2_neg+TEC3_neg 7 5 5 5 7 5 5 5 0 0 0 0 0 0 0 0
TEC1_neg+TEC2_neg+MTEC3_neg 0 2 2 2 0 2 2 2 0 0 0 0 0 0 0 0
TEC1_pos+TEC2_pos+TEC4_pos 11 4 3 3 10 3 2 2 1 1 1 1 0 0 0 0
TEC1_neg+TEC2_neg+TEC4_neg 0 1 1 1 0 1 1 1 0 0 0 0 0 0 0 0
TEC1_pos+TEC2_pos+MTEC4_pos 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
TEC2_pos+TEC3_pos+TEC4_pos 10 15 17 17 10 15 17 17 0 0 0 0 0 0 0 0
TEC2_neg+TEC3_neg+TEC4_neg 7 10 11 11 7 9 10 10 0 1 1 1 0 0 0 0
TEC2_pos+TEC3_pos+MTEC4_pos 1 2 2 2 1 1 1 1 0 1 1 1 0 0 0 0
TEC2_neg+TEC3_neg+MTEC4_neg 2 2 1 1 2 2 1 1 0 0 0 0 0 0 0 0
TEC2_pos+TEC3_pos+TEC5_pos 7 1 1 1 5 1 1 1 2 0 0 0 0 0 0 0
TEC2_neg+TEC3_neg+TEC5_neg 6 2 3 3 5 2 3 3 1 0 0 0 0 0 0 0
TEC2_pos+TEC3_pos+TEC6_pos 14 0 0 0 8 0 0 0 6 0 0 0 0 0 0 0
TEC2_neg+TEC3_neg+TEC6_neg 5 2 2 2 3 2 2 2 2 0 0 0 0 0 0 0
TEC3_pos+TEC4_pos+TEC5_pos 8 13 15 15 8 12 14 14 0 1 1 1 0 0 0 0
TEC3_neg+TEC4_neg+TEC5_neg 8 14 14 14 8 14 14 14 0 0 0 0 0 0 0 0
TEC3_pos+TEC4_pos+MTEC5_pos 2 2 2 2 2 2 2 2 0 0 0 0 0 0 0 0
TEC3_pos+TEC5_pos+TEC6_pos 6 3 3 3 3 3 3 3 3 0 0 0 0 0 0 0
TEC3_neg+TEC5_neg+TEC6_neg 4 4 2 2 2 3 1 1 2 1 1 1 0 0 0 0
TEC4_pos+TEC5_pos+TEC6_pos 0 4 4 4 0 4 4 4 0 0 0 0 0 0 0 0
TEC4_neg+TEC5_neg+TEC6_neg 6 5 7 7 2 5 7 7 4 0 0 0 0 0 0 0
TEC1_pos+TEC2_pos 93 49 48 48 88 47 47 47 5 2 1 1 0 0 0 0
TEC1_neg+TEC2_neg 77 39 38 38 73 39 38 38 4 0 0 0 0 0 0 0
TEC2_pos+TEC3_pos 25 24 24 24 22 22 22 22 3 2 2 2 0 0 0 0
TEC2_neg+TEC3_neg 21 22 22 22 20 21 21 21 1 1 1 1 0 0 0 0
TEC3_pos+TEC4_pos 0 2 3 3 0 2 3 3 0 0 0 0 0 0 0 0
TEC3_neg+TEC4_neg 4 3 3 3 3 2 2 2 1 1 1 1 0 0 0 0
TEC4_pos+TEC5_pos 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0
TIB1+TIB2 1025 646 650 650 932 579 585 585 93 67 65 65 0 0 0 0
TID1_pos+TID2_pos 51 22 23 23 48 21 22 22 3 1 1 1 0 0 0 0
TID1_neg+TID2_neg 51 23 23 23 46 21 21 21 5 2 2 2 0 0 0 0
TID2_pos+TID3_pos 14 16 17 17 12 14 14 14 2 2 3 3 0 0 0 0
TID2_neg+TID3_neg 16 14 14 14 15 13 13 13 1 1 1 1 0 0 0 0
TEC3_pos+TEC5_pos 3 1 1 1 3 1 1 1 0 0 0 0 0 0 0 0
A: DQM_V0001_R000000001__Global__CMSSW_ckfPU50__RECO
B: DQM_V0001_R000000001__Global__CMSSW_mkFitPU50LowPtQuad__RECO
C: DQM_V0001_R000000001__Global__CMSSW_scmod05_RECO
D: DQM_V0001_R000000001__Global__CMSSW_scmod05+dup_RECO