All tracks True tracks Fake tracks Duplicate tracks
A B C D A B C D A B C D A B C D
TIB1+TIB2+MTIB3 17 21 21 21 17 21 21 21 0 0 0 0 0 0 0 0
TIB1+TIB2+MTIB4 21 14 14 14 19 14 14 14 2 0 0 0 0 0 0 0
TIB1+TIB2+MTID1_pos 7 2 2 2 7 1 1 1 0 1 1 1 0 0 0 0
TIB1+TIB2+MTID1_neg 6 6 5 5 5 6 5 5 1 0 0 0 0 0 0 0
TID1_pos+TID2_pos+TID3_pos 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
TID1_neg+TID2_neg+TID3_neg 2 0 0 0 2 0 0 0 0 0 0 0 0 0 0 0
TID1_pos+TID2_pos+MTID3_pos 8 4 3 3 8 4 3 3 0 0 0 0 0 0 0 0
TID1_neg+TID2_neg+MTID3_neg 3 3 3 3 3 3 3 3 0 0 0 0 0 0 0 0
TID1_pos+TID2_pos+MTEC1_pos 0 1 1 1 0 1 1 1 0 0 0 0 0 0 0 0
TID2_pos+TID3_pos+TEC1_pos 9 4 4 4 9 4 4 4 0 0 0 0 0 0 0 0
TID2_neg+TID3_neg+TEC1_neg 1 3 3 3 1 3 3 3 0 0 0 0 0 0 0 0
TID2_pos+TID3_pos+MTEC1_pos 3 2 1 1 3 2 1 1 0 0 0 0 0 0 0 0
TID2_neg+TID3_neg+MTEC1_neg 5 6 5 5 5 6 5 5 0 0 0 0 0 0 0 0
TEC1_pos+TEC2_pos+TEC3_pos 3 0 0 0 3 0 0 0 0 0 0 0 0 0 0 0
TEC1_neg+TEC2_neg+TEC3_neg 2 1 1 1 2 1 1 1 0 0 0 0 0 0 0 0
TEC1_pos+TEC2_pos+TEC4_pos 3 2 2 2 2 2 2 2 1 0 0 0 0 0 0 0
TEC2_pos+TEC3_pos+TEC4_pos 3 2 3 3 3 2 3 3 0 0 0 0 0 0 0 0
TEC2_neg+TEC3_neg+TEC4_neg 1 3 3 3 1 3 3 3 0 0 0 0 0 0 0 0
TEC2_pos+TEC3_pos+MTEC4_pos 0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0
TEC2_neg+TEC3_neg+MTEC4_neg 1 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0
TEC2_pos+TEC3_pos+TEC5_pos 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
TEC2_neg+TEC3_neg+TEC5_neg 3 1 1 1 3 1 1 1 0 0 0 0 0 0 0 0
TEC2_pos+TEC3_pos+TEC6_pos 3 0 0 0 3 0 0 0 0 0 0 0 0 0 0 0
TEC2_neg+TEC3_neg+TEC6_neg 2 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0
TEC3_pos+TEC4_pos+TEC5_pos 0 7 9 9 0 6 8 8 0 1 1 1 0 0 0 0
TEC3_neg+TEC4_neg+TEC5_neg 3 5 5 5 3 5 5 5 0 0 0 0 0 0 0 0
TEC3_pos+TEC4_pos+MTEC5_pos 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
TEC3_pos+TEC5_pos+TEC6_pos 1 2 2 2 0 2 2 2 1 0 0 0 0 0 0 0
TEC3_neg+TEC5_neg+TEC6_neg 1 1 1 1 1 0 0 0 0 1 1 1 0 0 0 0
TEC4_neg+TEC5_neg+TEC6_neg 1 1 3 3 0 1 3 3 1 0 0 0 0 0 0 0
TEC1_pos+TEC2_pos 41 26 25 25 40 25 25 25 1 1 0 0 0 0 0 0
TEC1_neg+TEC2_neg 38 20 19 19 37 20 19 19 1 0 0 0 0 0 0 0
TEC2_pos+TEC3_pos 9 10 9 9 9 9 8 8 0 1 1 1 0 0 0 0
TEC2_neg+TEC3_neg 8 12 12 12 7 12 12 12 1 0 0 0 0 0 0 0
TEC3_pos+TEC4_pos 0 0 1 1 0 0 1 1 0 0 0 0 0 0 0 0
TEC3_neg+TEC4_neg 1 2 2 2 1 2 2 2 0 0 0 0 0 0 0 0
TEC4_pos+TEC5_pos 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0
TIB1+TIB2 532 383 386 386 517 375 378 378 15 8 8 8 0 0 0 0
TID1_pos+TID2_pos 31 15 16 16 30 15 16 16 1 0 0 0 0 0 0 0
TID1_neg+TID2_neg 28 13 14 14 28 12 13 13 0 1 1 1 0 0 0 0
TID2_pos+TID3_pos 8 6 6 6 8 6 6 6 0 0 0 0 0 0 0 0
TID2_neg+TID3_neg 9 8 8 8 9 8 8 8 0 0 0 0 0 0 0 0
TEC3_pos+TEC5_pos 0 1 1 1 0 1 1 1 0 0 0 0 0 0 0 0
A: DQM_V0001_R000000001__Global__CMSSW_ckfPU50__RECO
B: DQM_V0001_R000000001__Global__CMSSW_mkFitPU50LowPtQuad__RECO
C: DQM_V0001_R000000001__Global__CMSSW_scmod05_RECO
D: DQM_V0001_R000000001__Global__CMSSW_scmod05+dup_RECO